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This paper presents a novel technique of generating tests from a random sample of faults. The entire fault population of the circuit is randomly divided into two groups. Only one group, usually the smaller one, is used for test generation by the test-generator and fault-simulator programs. This group is known as the sample and its coverage is deterministic. The coverage of faults in the remaining group is similar to that of random vectors and is estimated from the distribution of fault detection probabilities in the circuit. As the sample size increases, the fraction of unsampled faults reduces. At the same time, a larger sample yields more test vectors to increase the random coverage. The analysis in the paper determines the coverage of random and deterministic vectors from the detection probability distribution. However, a two-pass test generation process requires no prior knowledge of this distribution. Test generation in the first pass is started with an arbitrary sample size. From the deterministic coverage in the sample, the detection probability distribution is determined using the Bayes’ theorem. Based on this distribution, the random coverage in the unsampled fault population is estimated and, if necessary, a second pass of test generation is executed with an appropriately larger sample. The sampling procedure is illustrated by several examples.


Proceedings of the 1988 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1988. ICCD '88. doi: 10.1109/ICCD.1988.25659 Copyright 1988 IEEE. Used by permission.